IIT Delhi team creates native micro‑GPU for affordable gadgets

IIT‑Delhi researchers have built a programmable micro‑graphics processing unit that can be made in India, marking the first working university‑designed micro‑GPU. The chip runs on a Spartan‑7 FPGA rather than a stand‑alone silicon die and targets graphics and display tasks, not high‑end AI workloads. Potential uses include industrial control panels, e‑rickshaw navigation screens, educational e‑book readers, small‑boat navigation terminals and other low‑cost embedded visual systems. The project was led by M‑Tech students Nammi Akash and M Ravi Teja under the guidance of professors Jayadeva and Kaushik Saha of the Electrical Engineering department. The team created a programmable graphics‑processor architecture described in RTL and implemented it on the FPGA platform, aiming for a compact design that could later be turned into an ASIC. Akash said the goal was a small yet truly programmable graphics core suitable for FPGA implementation and future ASIC realization to help bridge the digital divide. Teja added the architecture is scalable and can serve as an IP block for a range of affordable devices. Researchers are now working on an 8‑ to 16‑core vector‑style GPU, an optimized compiler and a software toolchain, with plans to prototype the design using a 65‑nm ASIC process that favors low cost and power efficiency. The next steps involve scaling the architecture, building the supporting software ecosystem and evaluating a full ASIC version.